FishTail Joins Synopsys in-Sync Program; FishTail Strengthens Integration with Synopsys' Design Compiler and PrimeTime Tools
PORTLAND, Ore.—(BUSINESS WIRE)—May 18, 2005—
FishTail Design Automation, Inc., the golden timing
constraints company, today announced that it has joined the Synopsys,
Inc., in-Sync(R) Program to provide customers with complete
interoperability between FishTail's Focus(TM) product and Synopsys'
Design Compiler(R) and PrimeTime(R) products. Designers import the
timing exceptions generated by Focus into the Design Compiler and
Prime-Time products, and by doing so are able to reduce the time
taken to close timing while also improving the quality of the final
chip implementation.
"Being part of the in-Sync Program is very important for us given
the importance of the Design Compiler and PrimeTime tools in the
market," stated Ajay Daga, founder and CEO of FishTail. "Our customers
routinely push us to strengthen our integration with these tools, and
in the short time we have had access to the Design Compiler product
in-house, we have already been able to take our integration to another
level. Our latest 2005.04 release in production today has this tighter
integration."
"For years Synopsys has initiated programs of its own and worked
with standards bodies and industry organizations to advance tool
interoperability throughout the electronic design automation
industry," said Karen Bartleson, director of Interoperability at
Synopsys, Inc. "Through the in-Sync interoperability program, Synopsys
works with EDA vendors such as FishTail, to identify and implement
optimal joint flows that maximize the productivity of our customers."
About Focus
FishTail's Focus(TM) product solves the time-consuming problem of
poor chip-implementation results because of missing or incorrect
timing exceptions by formally identifying false and multi-cycle paths
early in the design cycle before virtual prototyping and logic
synthesis. In addition, Focus also generates assertions that justify
why a false-path or multi-cycle path definition is correct. Using only
the synthesizable description and clock definitions, Focus
automatically generates the timing exceptions for the design in
standard SDC file format for use by downstream implementation tools.
About FishTail Design Automation
Founded in 2002, FishTail Design Automation has set its sights on
tackling the difficult problem of precise constraints on chip timing
-- the area where the success or failure of a design is ultimately
determined. The company's patented technology improves chip
implementation by automatically identifying exceptions to single-cycle
clocking from RTL descriptions. FishTail is privately funded. For more
information about FishTail and Focus, please visit the company's
website at www.fishtail-da.com.
FishTail and the Focus are trademarks of FishTail Design
Automation, Inc. Synopsys, Design Compiler, in-Sync and PrimeTime are
registered trademarks of Synopsys, Inc. All other brand names and
product names are the property of their respective owners.
Contact:
HighPointe Communications for FishTail
Barbara Marker, 503-209-2323
Barbara@hipcom.com
